Questions
Syllabus
Qns. By Syllabus

Semester

Subject

Bachelors Level/Second Year/Third Semester/Science csit/third semester/computer architecture/syllabus

B.Sc Computer Science and Information Technology

Institute of Science and Technology, TU

Nature of the course: (Theory+Lab)

F.M: 60+20+20 P.M: 24+8+8

Credit Hrs: 3Hrs

Computer Architecture [CSC213]
Course Objective
i.
Discuss representation of data and algorithms used to perform operations on data.
ii.
Demonstrate different operations in terms of Micro-operations.
iii.
Explain architecture of basic computer and micro-programmed control unit .
iv.
Understand and memory and I/O organization of a typical computer system.
v.
Demonstrate benefits of pipelined systems.
Course Description

This course includes concepts of instruction set architecture, organization or micro-architecture, and system architecture. The instruction set architecture includes programmer’s abstraction of computer. The micro-architecture consist internal representation of computers at register and functional unit level. The system architecture includes organization of computers at the cache and bus level

S1:Data Representation[4]
1
Data Representation: Binary Representation, BCD, Alphanumeric Representation, Complements, Fixed Point representation, Representing Negative Numbers, Floating Point Representation, Arithmetic with Complements, Overflow, Detecting Overflow
2
Other Binary Codes: Gray Code, self Complementing Code, Weighted Code, Excess-3 Code, EBCDIC
3
Error Detection Codes: Parity Bit, Odd Parity, Even parity, Parity Generator & Checker
S2:Register Transfer and Microoperations[5]
1
Microoperation, Register Transfer Language, Register Transfer, Control Function
2
Arithmetic Microoperations: Binary Adder, Binary Adder-subtractor, Binary Incrementer, Arithmetic Circuit
3
Logic Microoperations, Hardware Implementation, Applications of Logic Microoperations
4
Shift Microoperations: Logical Shift, Circular shift, Arithmetic Shift, Hardware Implementation of Shifter
S3:Basic Computer Organization and Design[8]
1
Instruction Code, Operation Code, Stored Program Concept
2
Registers and memory of Basic Computer, Common Bus System for Basic Computer
3
Instruction Format, Instruction Set Completeness, Control Unit of Basic Computer, Control Timing Signals
4
Instruction Cycle of Basic computer, Determining Type of Instruction, Memory Reference Instructions, Input-Output Instructions, Program Interrupt & Interrupt Cycle
5
Description and Flowchart of Basic Computer
S4:Microprogrammed Control[4]
1
Control Word, Microprogram, Control Memory, Control Address Register, Sequencer
2
Address Sequencing, Conditional Branch, Mapping of Instructions, Subroutines, Microinstruction Format, Symbolic Microinstructions
3
Design of Control Unit
S5:Central Processing Unit[4]
1
Major Components of CPU, CPU Organization
2
Instruction Formats, Addressing Modes, Data Transfer and manipulation, Program Control, Subroutine Call and Return, Types of Interrupt
3
RISC vs CISC, Pros and Cons of RISC and CISC, Overlapped Register Windows
S6:Pipelining[6]
1
Parallel Processing, Multiple Functional Units, Flynn’s Classification
2
Pipelining: Concept and Demonstration with Example, Speedup Equation, Floating Point addition and Subtraction with Pipelining
3
Instruction Level Pipelining: Instruction Cycle, Three & Four-Segment Instruction Pipeline, Pipeline Conflicts and Solutions
4
Vector Processing, Applications, Vector Operations, Matrix Multiplication
S7:Computer Arithmetic[6]
1
Addition and Subtraction with Signed Magnitude Data, Addition and Subtraction with Signed 2’s Complement Data
2
Multiplication of Signed Magnitude Data, Booth Multiplication, Division of Signed magnitude Data, Divide Overflow
S8:Input Output Organization[4]
1
Input-Output Interface: I/O Bus and Interface Modules, I/O vs. Memory Bus, Isolated vs. Memory-Mapped I/O
2
Asynchronous Data Transfer: Strobe, Handshaking
3
Modes of Transfer: Programmed I/O, Interrupt-Initiated I/O, Direct memory Access
4
Priority Interrupt: Polling, Daisy-Chaining, Parallel Priority Interrupt
5
Direct Memory Access, Input-Output Processor, DMA vs. IOP
S9:Memory Organization[4]
1
Memory Hierarchy, Main Memory, RAM and ROM Chips, Memory address Map, Memory Connection to CPU, Auxiliary Memory (magnetic Disk, Magnetic Tape)
2
Associative Memory: Hardware Organization, Match Logic, Read Operation, Write Operation
3
Cache Memory: Locality of Reference, Hit & Miss Ratio, Mapping, Write Policies
References
1.
M. Morris Mano, “Computer System Architecture”, Prentice-Hall of India, Pvt. Ltd., Third edition, 2007
2.
William Stallings, “Computer Organization and Architecture”, Prentice-Hall of India, Pvt. Ltd., Seventh edition, 2005
3.
Vincent P. Heuring and Harry F. Jordan, “Computer System Design and Architecture”, Prentice-Hall of India, Pvt. Ltd., Second edition, 2003
Labrotary Work
The laboratory work includes implementing and simulating the algorithms, studied in the course, by using high level languages like C or VHDL. The laboratory works should include at least following concepts
1.
Simulate features like overflow, data representation by using VHDL
2.
Simulate design of different units by using VHDL
3.
Simulate pipelining by using VHDL
4.
Implement algorithms for computer arithmetic using high level language like C or C++