S1:Number Systems, Operations and Codes[6]
1
History of Number System, Introduction to Number System (Positional and Non positional), Decimal, Binary, Octal, Hexadecimal Number Systems
2
Conversion from one number system to another (Binary, Octal, Hex to Decimal; Decimal to Binary, Octal and Hex; Binary to Octal, Octal to Binary, Binary to Hex, Hex to binary)
3
Compliment of Number Systems (r's complement and r-1's compliment with r as 2 and 10)
4
Addition and Subtraction of Binary Numbers, Binary Codes (Absolute, Gray Code, weighted binary code, BCD, ASCII, Unicode) and Error Detection Codes
S2:Digital Design Fundamentals and Boolean algebra[8]
1
Digital and Analog Signals (Definition, example and difference between them)
2
Logic Operations (Definition and Truth Table of AND, OR, NOT)
3
Introduction to the System Concept, Logic Gates (Basic Gates, Derived Gates, Universal Gates)
4
Logic Function and Boolean Algebra (characteristics, laws, simplifications using laws, principle of duality)
S3:Simplification of Boolean Functions[5]
1
K-map, Two and Three variable maps, Four variable maps, product of sum simplification
2
NAND and NOR implementation, Don't Care conditions
S4:Combinational Logic[7]
1
Adders and Subtractors (Half and full binary adder and subtractor), Parallel Binary Adders
2
Multiplexers and Demultiplexers
3
Encoders and Decoders, Seven segment decoder
4
Code Converters, Magnitude comparator (2 bit and 4 bit)
S5:Sequential Logic[4]
1
Latches and Flip-Flops (RS, JK, D, T, Master-Slave), Edge-Triggered Flip-Flops
2
Flip-Flop Operating Characteristics, Flip-Flop Applications
S6:Counters, Registers and Memory[9]
1
Asynchronous Counters, Synchronous Counters, Up/Down Counters, Counter Applications
2
Basic Shift Register Operations, Shift Register Types, Bidirectional Shift Registers, Shift Register Counters
3
Basic Memory Operations and memory types (ROM, PLA, PAL)
S7:Processor Logic Design[6]
1
Processor Organization, Arithmetic Logic Unit, Design of Arithmetic Circuit, Design of Logic Circuit, Design of Arithmetic Logic Unit (one bit ALU design only) Status Register, Design of Shifter (4 bit combinational logic shifter)
References
1.
Mano M.M., Digital logic and Computer Design, Pearson Education
2.
Mano M.M. and Ciletti M. M, Digital Design, 4thedition
3.
Brown S. and Vranesic Z., Fundamentals of Digital Logic with VHDL Design, 3rd edition, McGraw Hill
4.
Rafiquzzaman M., Fundamentals of Digital Logic and Microcomputer Design, 5th edition, JohnWiley & Sons, Inc.
5.
Holdsworth B. and Woods C., Digital Logic Design, 4th edition
6.
Mano M. M, Kime C. R , Logic and computer design fundamentals, 2nd edition
Labrotary Work
Familiarization with Logic Gates
DeMorgan’s law and its familiarization with NAND and NOR gates
Encoder, Decoder, Multiplexer and Demultiplexer, Seven segment display
Familiarization with Binary Addition and Subtraction
To realize a. Half Adder and Full Adder and Half Subtractor and Full Subtractor by using Basic gates and NAND gates
Implementation of true complement generator
Implementation of RS and T type flip flops
Implementation of D and JK type flip flops
Ripple Counter, Synchronous counter
Conversion of parallel data into serial format
Generation of timing signal for sequential system
Familiarization with PLAs and PLDs